1. Field of the Invention
The present invention generally relates to electronic circuits and, more specifically, to systems in which several circuits are capable of communicating over a twin-wire bus comprising a data wire and a wire conveying a synchronization signal. The present invention more specifically applies to an I2C bus.
2. Discussion of the Related Art
Communication protocols on twin-wire buses use, in addition to a reference signal (generally, the ground) representing one of the two states of the binary signals, a data signal (SDA) and a clock or synchronization signal (SCL). It is thus spoken of a twin-wire bus, but a reference level is further required.
A current example is the I2C protocol, used to communicate between a master device or circuit which generates the synchronization signal on the clock wire as well as a data signal on the data wire towards a slave device or circuit. The slave device (receiver) generates an acknowledgement bit that it transmits over the data wire. In practice, the bus conductors will be, in the idle state, at a voltage different from the reference voltage, this second voltage representing the other one of the two states of the binary signals.
It would be desirable to take advantage of the presence of an I2C bus to transmit other data than those of the I2C protocol. In other words, it would be desirable to use the structure of a twin-wire bus for another communication channel.